Silicon on Insulator (SOI) Wafers, Size: 6'', Device Thickness: 340 nm, P type

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NG09SIOW0903
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Silicon on Insulator (SOI) Wafers

Size: 6'', Device Thickness: 340 nm, P type

Technical Properties:  

Size (inch)

 6”

Thickness (μm)

 625

Resistivity 

 1-20 ohm.cm

Grade

 Prime

Dopant

 P type (Boron doped )

Orientation

 100

Device Thickness

 340 nm

Device Resistivity 

 1-20 ohm.cm

Device Type

 P type (Boron doped )

Device Orientation

 100

BOX Thickness

 2 um

Fields of Application for Silicon on Insulator (SOI) Wafer

Silicon on insulator (SOI) wafer is obtained with the addition of insulating layer. Silicon on insulator (SOI) wafer is placed between silicon substrate and an upper 
layer of silicon. The fundamental aim of using silicon on insulator (SOI) wafer is to increase the performance of the conventional silicon wafer by decreasing 
electrical losses. In case of reducing power and heat while increasing the speed performance of a device silicon on insulator (SOI) wafer is helpful.

Best insulation depends on the application aims, for instance silicon dioxide is the most common insulator in microelectronics since it has ability to reduce short-channel effects.

Silicon on insulator (SOI) wafer has reduced temperature dependency due to no doping and better yield due to high density.

  • Silicon on insulator (SOI) wafer is used in silicon photonics.
  • Silicon on insulator (SOI) wafer is used in microelectronic devices.
  • Silicon on insulator (SOI) wafer is used for radio frequency (RF).
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